Visual Intelligence Lab, College of Intelligence and Computing, Tianjin University
Visual Intelligence Lab, College of Intelligence and Computing, Tianjin University
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Jun Yang
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A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System (IEEE J. Solid State Circuits, 2020)
A Low Overhead, Within-a-Cycle Adaptive Clock Stretching Circuit With Wide Operating Range in 40-nm CMOS (IEEE Trans. Circuits Syst. II Express Briefs, 2018)
A Low-Overhead Timing Monitoring Technique for Variation-Tolerant Near-Threshold Digital Integrated Circuits (IEEE Access, 2018)
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